高云GW1NSR-4C开发板上手使用

2023-12-13 16:00:17

1.开发板

核心板,主芯片GW1NSR-LV4CQN48P,丝印文字“奥陶纪Octet,QQ群808770961”:

晶振:27MHz,22引脚

两个按键:靠近中间,23引脚,按下为低电平;靠近外侧,20引脚,按下为低电平

靠近USB接口右侧6针为JTAG接口,引脚定义为左侧丝印文字,在6针下侧有4个拨码开关,“on”位置对板载FPGA编程。

底板,丝印文字“Mini_Star Basic Experiment Board”:

8个LED:低电平亮

数码管段码:低电平亮

数码管位码:高电平选中

拨码开关(SW):拨上高电平,拨下低电平

按键(KEY):不按高电平,按下低电平

2.IDE软件

版本要求1.9.9及以上,下载地址:广东高云半导体科技股份有限公司 (gowinsemi.com.cn)

3.示例

点灯程序,以FPGA内部集成210Mhz振荡器作为时钟源,利用OSC核:

module Gowin_OSC (Q);
output reg[7:0] Q;
reg [11:0] cnt;

OSCZ osc_inst (
    .OSCOUT(oscout),
    .OSCEN(1'b1)
);

defparam osc_inst.FREQ_DIV = 128;  //210M经此分频后约1.64M
defparam osc_inst.S_RATE = "SLOW";

always@(posedge oscout )
 cnt<=cnt+1'b1;

always@(posedge cnt[11] )
 Q<=Q+1'b1;
endmodule //Gowin_OSC

引脚约束

IO_LOC "Q[7]" 34;
IO_PORT "Q[7]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[6]" 35;
IO_PORT "Q[6]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[5]" 31;
IO_PORT "Q[5]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[4]" 32;
IO_PORT "Q[4]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[3]" 29;
IO_PORT "Q[3]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[2]" 30;
IO_PORT "Q[2]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[1]" 27;
IO_PORT "Q[1]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[0]" 28;
IO_PORT "Q[0]" PULL_MODE=NONE DRIVE=8;

利用PLL实现的,时钟为27M。

module Gowin_PLLVR (Q, clkin);
output reg[7:0] Q;
input clkin;  //27M

wire lock_o;
wire clkoutp_o;
wire clkoutd_o;
wire clkoutd3_o;
wire gw_vcc;
wire gw_gnd;

reg [11:0] cnt;

assign gw_vcc = 1'b1;
assign gw_gnd = 1'b0;

PLLVR pllvr_inst (  //5.4M输出
    .CLKOUT(clkout),
    .LOCK(lock_o),
    .CLKOUTP(clkoutp_o),
    .CLKOUTD(clkoutd_o),
    .CLKOUTD3(clkoutd3_o),
    .RESET(gw_gnd),
    .RESET_P(gw_gnd),
    .CLKIN(clkin),
    .CLKFB(gw_gnd),
    .FBDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .IDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .ODSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .PSDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .DUTYDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .FDLY({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),
    .VREN(gw_vcc)
);

defparam pllvr_inst.FCLKIN = "27";
defparam pllvr_inst.DYN_IDIV_SEL = "false";
defparam pllvr_inst.IDIV_SEL = 4;
defparam pllvr_inst.DYN_FBDIV_SEL = "false";
defparam pllvr_inst.FBDIV_SEL = 0;
defparam pllvr_inst.DYN_ODIV_SEL = "false";
defparam pllvr_inst.ODIV_SEL = 112;
defparam pllvr_inst.PSDA_SEL = "0000";
defparam pllvr_inst.DYN_DA_EN = "true";
defparam pllvr_inst.DUTYDA_SEL = "1000";
defparam pllvr_inst.CLKOUT_FT_DIR = 1'b1;
defparam pllvr_inst.CLKOUTP_FT_DIR = 1'b1;
defparam pllvr_inst.CLKOUT_DLY_STEP = 0;
defparam pllvr_inst.CLKOUTP_DLY_STEP = 0;
defparam pllvr_inst.CLKFB_SEL = "internal";
defparam pllvr_inst.CLKOUT_BYPASS = "false";
defparam pllvr_inst.CLKOUTP_BYPASS = "false";
defparam pllvr_inst.CLKOUTD_BYPASS = "false";
defparam pllvr_inst.DYN_SDIV_SEL = 2;
defparam pllvr_inst.CLKOUTD_SRC = "CLKOUT";
defparam pllvr_inst.CLKOUTD3_SRC = "CLKOUT";
defparam pllvr_inst.DEVICE = "GW1NSR-4C";

always@(posedge clkout )
 cnt<=cnt+1'b1;

always@(posedge cnt[11] )
 Q<=Q+1'b1;

endmodule //Gowin_PLLVR

引脚约束在以上基础上,增加clkin:

IO_LOC "clkin" 22;
IO_PORT "clkin" PULL_MODE=UP;

文章来源:https://blog.csdn.net/weixin_41784968/article/details/134894316
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